Heinmann Logic Gate diagram, possible error? (1 Viewer)

[ErgoSum]

Hi, im using the Heinemann Sdd Text book and the logic gate diagram of the Gated And D type flip flops on page 301 looks kinda wrong, from the diagram im assuming they are trying to make a gated version of the NOR gate RS flip flop shown in figure 10.15, but why in figure 10.16 and 10.17 do they invert the output of the and gates? Doing this would make sense on a NAND gate rs flip flop but why on an NOR gate flip flop? unless im missing something? could anyone please clarrify if these diagrams are wrong, or (more likely) what im missing?

Thanks

 

[1234567]

reading ur thingy makes me realise that i am gonna fail sdd

 

[blah]

hey ergosum u r right so dun wori. the following is a quote from the Heinemann answers :

"This was meant to be a fairly simple exercise. If you look at Figure 10.17 on Page 301 you can see that there are some AND-NOT and OR-NOT pairs that can obviously be replaced by NAND gates and NOR gates respectively. Investigation though, reveals that a mistake has been made in Figures 10.16 and 10.17 the NOT gates after the AND gates should not be there! A little investigation will show that the circuits as drawn will sometimes result in the disallowed input of two ones to the RS flip-flop part of the circuit."

 

[blah]

hey ergosum can u plz help me wif a queston that i dun understand. its question 25(c)(i) from last years catholic trials paper.

its bout drawing a truth table and i jus dun get it.

PLZ HELP ME

thnx

 

[ErgoSum]

THanks blah

Hey blah, thanks a lot
as to that question, ive looked at it, and the "sample" answer seems a bit dodgy, as in C=0 D=0 should simply remember the last state the flip flop was in, so any answer where q is different to q' should be correct
C=1 D=1 should also be an illegal state for that type of flip flop.

In addition i built it with
http://www.tt.rim.or.jp/~kazz/simcir/simcir.html
and if constructed correctly the other possibilities A=0 B=1 and A=1 B=0 give exactly opposite answers to those in the provided answer, so i dont know wha help i can give

If you want me to upload the simcir diagram that i built i can but you should be able to figure it out by urself(use leds to represent Q and Q')

 

[blah]

hey thnx ergo.

the main thing i dun understand is how do u kno the value of C (if A is 1) and C (if B is 1) coz u dunno the other inputs to the AND gates. its obvious that the output would b 0 if either input is 0, but wot bout if u only kno one of them is 1? u kno wot i mean?

but i certainly agree wif the C=0,D=0 and C=1,D=1 thing.

and btw if u didnt kno already u can find answers to the heinmann book from www.hi.com.au/softwaredesign